28 February 2001
Shaking Up Drives
by Eric Persson
Changes in control and isolation partitioning have created higher-performing, more efficient, more reliable drives.
Isolation in AC motor drives has significant implications, beyond simply where to draw the line across the circuit board. It has dramatic impact on the control circuitry, feedback and measurement circuits, and interface circuit complexity. In fact, the decision of where that isolation boundary is drawn can completely change the flow of signals and information in a drive. Depending on the application and design, one can use many different control architectures.
Traditional approaches have progressed to ever-higher levels of integration. Recent advances in high-voltage integrated circuit (HVIC) design have allowed the majority of drive control functions to be on the same side of the isolation barrier as the power devices themselves. This new architecture creates significant advantages in the motor drive's performance, size, and cost.
Moreover, by shifting the control function into hardware in the power electronics—a drive in which control and power electronics are fully integrated and isolation occurs over a serial interface—the designer will have a much smaller burden of software design compared with the traditional approach. In effect, the drive becomes a peripheral device, using a high-level communication language.
Following is a review of the various design topologies, highlighting the advantages and disadvantages of each design.
The Basic Topology
For AC drives under about 5 kilowatts, the general topology hasn't changed much in the past 10 years. As shown in Figure 1, the basic topology has an input rectifier, a DC bus capacitor, a shunt regulator (brake circuit), control electronics, an output inverter, and a bias power supply for the control electronics. While there have been improvements in semiconductor device performance resulting in smaller, better performing, more efficient drives, the essential building blocks of Figure 1 remain the same. However, the interconnection among the control electronics, inverter, and power supply shows where the real evolution in drive design has occurred.
Isolation—The Hard Way
Figure 2 shows a classic, fully isolated approach to drive design. The control electronics (shown in green) are referenced to earth ground and have dedicated 5-volt (V) and ±15-V supplies. The low-side integrated gate bipolar transistors (IGBTs)—including the brake—are optically isolated from the control circuit (and earth ground) and share a 15-V isolated supply. The three high-side IGBTs are also optically isolated, and each has its own isolated 15-V supply.
Isolation makes this topology convenient for development and maintenance because grounded oscilloscope probes connect directly to the control circuit without the worry of ground loops or sparks flying. In addition, if user-accessible connection to the control circuit is required, this topology can easily meet low-voltage safety requirements.
The topology is also relatively insensitive to voltage spikes between DC bus ground and circuit ground. These voltage spikes, which are due to parasitic layout inductance, can cause malfunctions in drives that share a common ground for the DC bus and control circuits.
However, there are some disadvantages. First, current feedback (whether it comes from the DC bus, emitter resistor sensing, or motor phase) must be isolated. Isolated current measurement means (e.g., Hall-effect transducers) are relatively large and expensive compared with HVIC measurement techniques. Both Hall-effect and optocoupled current measurement methods have inherently more delay in sensing and reporting overcurrent conditions than HVIC methods. Seemingly small delays of a microsecond are important for robust protection of the output stage during high-current fault conditions (e.g., a short circuit).
The second factor is the sheer number of isolated gate drivers, which significantly adds to the size and cost of the drive. In addition, the bias power supply must have multiple isolated outputs (typically seven). This clearly results in a custom, large, and more costly solution. In addition, to add short-circuit protection using desaturation detection requires nearly doubling the number of optocouplers.
A Better Way
To overcome some of these limitations, the topology of Figure 3 emerged. The fundamental difference between designs 2 and 3 is that the control circuit ground is tied to the DC bus ground and no longer referenced to earth ground. Therefore, the control circuit can now directly drive all four low-side IGBTs, allowing the same 15-V supply that powers the control circuit to power the gate drivers, eliminating one of the isolated power supply outputs.
Current sensing also appears simpler, using sense resistors on each of the low-side IGBTs' emitters. However, the current measured is only the individual half-bridge current. Deriving the actual motor current requires both sample and hold amplifiers and reconstruction circuits. Yet proponents of this technique argue that emitter resistor sensing allows detection of shoot-through overcurrent and reconstructed motor current using the same three resistors with relatively inexpensive circuits. This eliminates the need for motor phase current sensing and desaturation detection circuits, thus reducing overall measurement circuitry.
Using sense resistors does have its limitations. When the drive control strategy uses a high modulation index, motor current reconstruction becomes very difficult, due to the very narrow or altogether missing current pulses on the sense resistors. One other consideration: Not all IGBT packages are compatible with individual emitter resistor sensing techniques, thereby making it impossible to implement. One other variation uses a single sense resistor on the negative bus in lieu of three emitter resistors, but the reconstruction circuit becomes much more complex and can provide only amplitude information, not direction.
If isolation is required for the user interface or some other reason in the topology of Figure 3, some of its advantages disappear. The power supply's isolated output will again be required, this time to power the user interface's distal side. Additionally, several optocouplers will be required to communicate across the isolation barrier. Although the optocouplers required for communications will most likely be less costly than those for gate drive, the overall difference between the topologies in Figures 2 and 3 becomes one of current measurement and fault protection strategy.
HVIC—Integration and Speed
The introduction of gate drivers based on HVIC technology has led to the next significant level of motor drive integration. These products (as half-bridge drivers) have been around for more than 10 years, with complete three-phase driver integrated circuits (ICs) introduced more recently. The drivers are referenced to the negative DC bus, driving the low-side gates with a low-impedance buffer. The high-side drivers "float" inside an isolation well and communicate with the ground-referenced side through high-voltage level shifters. Power to the high side is supplied by a small storage capacitor that's periodically recharged each time the low side turns on. This technique is commonly known as a "bootstrap" power supply.
While this technique offers significant reductions in size and cost of the gate driver, it does have limitations. First, the maximum duty cycle can't quite reach 100% because the bootstrap supply requires periodic refreshing. This is typically a minor consideration, however, as the actual loss of duty cycle headroom is less than 1%.
The second consideration is that HVIC drivers use zero-voltage gate turnoff rather than a negative bias voltage that some isolated drivers can provide. This was more of a concern with early generation IGBTs that had large collector to gate capacitance. Modern IGBTs are vastly improved in this area and fully compatible with zero-voltage gate turnoff.
These considerations are minor compared with the benefits of HVIC topology: fewer isolated power supply outputs, better current measurement, fewer components and less real estate, and better timing performance. Figure 4 shows the HVIC drive design. Note that the power supply is simplified to only two nonisolated outputs. Motor phase current is measured directly using a pair of HVICs that level-shifts the current measurement to the low side for direct connection to the control electronics (no isolation necessary). Not only does the HVIC current measurement technique provide higher accuracy and lower temperature drift than competitive techniques, but also the output is already in digital format (a pulse width modulation, or PWM, signal), so it can directly interface to the control circuit without needing sample/hold amplifiers or analog-to-digital converters. The HVIC current sensing technique also saves valuable time—more than 1 microsecond (µsec)—in reporting an overcurrent fault, compared with optocoupler or Hall-effect methods.
One of the major differences between optocoupled gate drive and HVIC gate drive is the propagation delay time and, in particular, the uncertainty of that propagation delay time. Optocouplers are hybrid assemblies, and their performance parameters vary with temperature and age. The delay mismatch between any two optocouplers can easily be 1 µsec, whereas the HVIC technology guarantees better than 10 times that: 75 nanoseconds (nsec). This has a major impact on dead time (sometimes called blanking time), the delay between turning off one transistor in a half bridge and turning on the other. In fact, some drives using HVIC gate drive now operate with dead times below 700 nsec. Optocoupled drives typically have dead times at least twice that long to account for the propagation delay uncertainty. With PWM frequencies pushing past 10 kilohertz, long dead times significantly affect current loop linearity and bandwidth and cause torque pulsations at low rotational speeds.
A major advantage of the HVIC design is overcurrent desaturation detection on all three high-side drivers. Combined with a DC bus current sensing amplifier on the low side, all overcurrent fault conditions can be quickly detected and an orderly shutdown initiated. Moreover, compared with separate optocouplers of the earlier designs, the HVIC driver coordinates the shutdown of all gate drivers with negligible time delay.
Perhaps the most significant difference between the drive topologies in Figures 3 and 4 is that the microcontroller has moved outside of the power electronics block to the position of "host" controller. Rather than using a microcontroller or digital signal processor (DSP) running complex software for the function of drive control, a dedicated interface IC, such as the one we recently introduced, accomplishes the tasks of PWM generation, dead-time insertion, and fault management in a single piece of silicon. By taking on these tasks in hardware, the burden of software development and software verification for the DSP or microcontroller is greatly reduced. The interface IC communicates to the host over a simple, industry-standard serial interface (synchronous peripheral interface), allowing simple, high-level language communication between the host and the drive.
For example, the host sends serial data to the drive containing motor phase voltage coordinates, and the drive returns motor phase current data. If an overcurrent is detected by one of several possible methods, the gate driver initiates a synchronized, soft shutdown, and the fault is reported back to the host along with diagnostic information to help identify the cause. The drive has, in effect, become like an intelligent peripheral, communicating with the host over an industry-standard bus.
This truly blurs the line between control and power electronics. The topology in Figure 4 tightly integrates all of the high-speed functions necessary for high-performance drive operation, while at the same time simplifying not only the hardware design but also the software design burden.
The advent of new high-voltage ICs has enabled major advances in control and power function integration in motor drives. Using these ICs, drive topologies have advanced to the point where much of the intelligence resides in hardware, nonisolated, next to the power devices. This tight coupling between control and power devices improves propagation delay times, thereby improving drive performance. In addition, by performing the majority of common drive functions in hardware, the amount of programming required in the microcontroller or DSP is dramatically reduced. As a matter of fact, the microcontroller's function becomes that of host controller that sends high-level commands to the drive, freeing it to take care of other tasks such as motion profile and user interface.
Changes in the control and isolation partitioning have brought about higher-performing, more efficient, more reliable drives. However, this isn't the end but just the next step in motor drive evolution. MC
Figures and Graphics
- Figure 1. Basic AC drive topology.
- Figure 2. Traditional, fully isolated topology.
- Figure 3. Simplified, isolated topology.
- Figure 4. New topology using HVICs.
- PDF of "Shaking Up Drives"
Author Information
Eric Persson is the design manager for International Rectifier's power IC systems. He has more than 20 years' experience in drive and power electronic design. Contact him at 233 Kansas Street, El Segundo, CA 90245; tel: (952) 941-3349.
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